{"id":3574,"date":"2022-12-20T17:09:03","date_gmt":"2022-12-20T20:09:03","guid":{"rendered":"http:\/\/lode.uno\/linux-man\/index.php\/2022\/12\/20\/setpci-man8\/"},"modified":"2022-12-20T17:09:03","modified_gmt":"2022-12-20T20:09:03","slug":"setpci-man8","status":"publish","type":"post","link":"https:\/\/lode.uno\/linux-man\/2022\/12\/20\/setpci-man8\/","title":{"rendered":"setpci (man8)"},"content":{"rendered":"

setpci<\/h1>\n

NAME<\/a>
SYNOPSIS<\/a>
DESCRIPTION<\/a>
OPTIONS<\/a>
DEVICE SELECTION<\/a>
OPERATIONS<\/a>
EXAMPLES<\/a>
SEE ALSO<\/a>
AUTHOR<\/a> <\/p>\n

\n

NAME <\/a> <\/h2>\n

setpci \u2212 configure PCI devices<\/p>\n

SYNOPSIS <\/a> <\/h2>\n

setpci<\/b> [options<\/b>] devices operations<\/b>…<\/p>\n

DESCRIPTION <\/a> <\/h2>\n

setpci<\/b> is a utility for querying and configuring PCI devices.<\/p>\n

All numbers are entered in hexadecimal notation.<\/p>\n

Root privileges are necessary for almost all operations, excluding reads of the standard header of the configuration space on some operating systems. Please see lspci(8)<\/b> for details on access rights.<\/p>\n

OPTIONS <\/a> <\/h2>\n

General options<\/b><\/p>\n\n\n\n\n\n
<\/td>\n\n

-v<\/b><\/p>\n<\/td>\n

<\/td>\n\n

Tells setpci<\/i> to be verbose and display detailed information about configuration space accesses.<\/p>\n<\/td>\n<\/tr>\n

<\/td>\n\n

-f<\/b><\/p>\n<\/td>\n

<\/td>\n\n

Tells setpci<\/i> not to complain when there\u2019s nothing to do (when no devices are selected). This option is intended for use in widely-distributed configuration scripts where it\u2019s uncertain whether the device in question is present in the machine or not.<\/p>\n<\/td>\n<\/tr>\n

<\/td>\n\n

-D<\/b><\/p>\n<\/td>\n

<\/td>\n\n

\u2018Demo mode\u2019 — don\u2019t write anything to the configuration registers. It\u2019s useful to try setpci -vD<\/b> to verify that your complex sequence of setpci<\/b> operations does what you think it should do.<\/p>\n<\/td>\n<\/tr>\n

<\/td>\n\n

-r<\/b><\/p>\n<\/td>\n

<\/td>\n\n

Avoids bus scan if each operation selects a specific device (uses the -s<\/b> selector with specific domain, bus, slot, and function). This is faster, but if the device does not exist, it fails instead of matching an empty set of devices.<\/p>\n<\/td>\n<\/tr>\n<\/table>\n

–version<\/b><\/p>\n

Show setpci<\/i> version. This option should be used stand-alone.<\/p>\n\n\n
<\/td>\n\n

–help<\/b><\/p>\n<\/td>\n

<\/td>\n\n

Show detailed help on available options. This option should be used stand-alone.<\/p>\n<\/td>\n<\/tr>\n<\/table>\n

–dumpregs<\/b><\/p>\n

Show a list of all known PCI registers and capabilities. This option should be used stand-alone.<\/p>\n

PCI access options<\/b>
The PCI utilities use the PCI library to talk to PCI devices (see pcilib<\/b>(7) for details). You can use the following options to influence its behavior:
-A <\/b><\/p>\n

The library supports a variety of methods to access the PCI hardware. By default, it uses the first access method available, but you can use this option to override this decision. See -A help<\/b> for a list of available methods and their descriptions.<\/p>\n

-O =<\/b><\/p>\n

The behavior of the library is controlled by several named parameters. This option allows to set the value of any of the parameters. Use -O help<\/b> for a list of known parameters and their default values.<\/p>\n\n\n\n\n
<\/td>\n\n

-H1<\/b><\/p>\n<\/td>\n

<\/td>\n\n

Use direct hardware access via Intel configuration mechanism 1. (This is a shorthand for -A intel-conf1<\/b>.)<\/p>\n<\/td>\n<\/tr>\n

<\/td>\n\n

-H2<\/b><\/p>\n<\/td>\n

<\/td>\n\n

Use direct hardware access via Intel configuration mechanism 2. (This is a shorthand for -A intel-conf2<\/b>.)<\/p>\n<\/td>\n<\/tr>\n

<\/td>\n\n

-G<\/b><\/p>\n<\/td>\n

<\/td>\n\n

Increase debug level of the library.<\/p>\n<\/td>\n<\/tr>\n<\/table>\n

DEVICE SELECTION <\/a> <\/h2>\n

Before each sequence of operations you need to select which devices you wish that operation to affect.
-s [[[[]:]]:][][.[]]<\/b><\/p>\n

Consider only devices in the specified domain (in case your machine has several host bridges, they can either share a common bus number space or each of them can address a PCI domain of its own; domains are numbered from 0 to ffff), bus (0 to ff), slot (0 to 1f) and function (0 to 7). Each component of the device address can be omitted or set to “*”, both meaning “any value”. All numbers are hexadecimal. E.g., “0:” means all devices on bus 0, “0” means all functions of device 0 on any bus, “0.3” selects third function of device 0 on all buses and “.4” matches only the fourth function of each device.<\/p>\n

-d []:[]<\/b><\/p>\n

Select devices with specified vendor and device ID. Both ID\u2019s are given in hexadecimal and may be omitted or given as “*”, both meaning “any value”.<\/p>\n

When -s<\/b> and -d<\/b> are combined, only devices that match both criteria are selected. When multiple options of the same kind are specified, the rightmost one overrides the others.<\/p>\n

OPERATIONS <\/a> <\/h2>\n

There are two kinds of operations: reads and writes. To read a register, just specify its name. Writes have the form name<\/i>=value<\/i>,value<\/i>… where each value<\/i> is either a hexadecimal number or an expression of type data<\/i>:mask<\/i> where both data<\/i> and mask<\/i> are hexadecimal numbers. In the latter case, only the bits corresponding to binary ones in the mask<\/i> are changed (technically, this is a read-modify-write operation).<\/p>\n

There are several ways how to identity a register:<\/p>\n\n\n\n\n\n\n\n\n
<\/td>\n\n

\u2022<\/p>\n<\/td>\n

<\/td>\n\n

Tell its address in hexadecimal.<\/p>\n<\/td>\n<\/tr>\n

<\/td>\n\n

\u2022<\/p>\n<\/td>\n

<\/td>\n\n

Spell its name. Setpci knows the names of all registers in the standard configuration headers. Use \u2018setpci –dumpregs<\/b>\u2019 to get the complete list. See PCI bus specifications for the precise meaning of these registers or consult header.h<\/b> or \/usr\/include\/pci\/pci.h<\/b> for a brief sketch.<\/p>\n<\/td>\n<\/tr>\n

<\/td>\n\n

\u2022<\/p>\n<\/td>\n

<\/td>\n\n

If the register is a part of a PCI capability, you can specify the name of the capability to get the address of its first register. See the names starting with \u2018CAP_\u2019 or \u2018ECAP_\u2019 in the –dumpregs<\/b> output.<\/p>\n<\/td>\n<\/tr>\n

<\/td>\n\n

\u2022<\/p>\n<\/td>\n

<\/td>\n\n

If the name of the capability is not known to setpci<\/b>, you can refer to it by its number in the form CAPid<\/b> or ECAPid<\/b>, where id<\/b> is the numeric identifier of the capability in hexadecimal.<\/p>\n<\/td>\n<\/tr>\n

<\/td>\n\n

\u2022<\/p>\n<\/td>\n

<\/td>\n\n

Each of the previous formats can be followed by +offset<\/b> to add an offset (a hex number) to the address. This feature can be useful for addressing of registers living within a capability, or to modify parts of standard registers.<\/p>\n<\/td>\n<\/tr>\n

<\/td>\n\n

\u2022<\/p>\n<\/td>\n

<\/td>\n\n

To choose how many bytes (1, 2, or 4) should be transferred, you should append a width specifier .B<\/b>, .W<\/b>, or .L<\/b>. The width can be omitted if you are referring to a register by its name and the width of the register is well known.<\/p>\n<\/td>\n<\/tr>\n

<\/td>\n\n

\u2022<\/p>\n<\/td>\n

<\/td>\n\n

Finally, if a capability exists multiple times you can choose which one to target using @number<\/b>. Indexing starts at 0.<\/p>\n<\/td>\n<\/tr>\n<\/table>\n

All names of registers and width specifiers are case-insensitive.<\/p>\n

EXAMPLES <\/a> <\/h2>\n

COMMAND<\/p>\n

asks for the word-sized command register.<\/p>\n\n\n
<\/td>\n\n

4.w<\/p>\n<\/td>\n

<\/td>\n\n

is a numeric address of the same register.<\/p>\n<\/td>\n

 <\/td>\n<\/tr>\n<\/table>\n

COMMAND.l<\/p>\n

asks for a 32-bit word starting at the location of the command register, i.e., the command and status registers together.<\/p>\n

VENDOR_ID+1.b<\/p>\n

specifies the upper byte of the vendor ID register (remember, PCI is little-endian).<\/p>\n

CAP_PM+2.w<\/p>\n

corresponds to the second word of the power management capability.<\/p>\n

ECAP108.l<\/p>\n

asks for the first 32-bit word of the extended capability with ID 0x108.<\/p>\n

SEE ALSO <\/a> <\/h2>\n

lspci<\/b>(8), pcilib<\/b>(7)<\/p>\n

AUTHOR <\/a> <\/h2>\n

The PCI Utilities are maintained by Martin Mares .<\/p>\n

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